Input Output Organization

I/O organization coordinates CPU, memory, and peripherals for efficient data transfer.

Key formulas & points

Skim these first — then read the full notes below.

  • Vectored interrupt supplies handler address
  • Interrupt priority and nesting
  • Memory-mapped I/O vs isolated I/O port space

Topic details

Introduction

Stallings emphasizes that I/O performance can dominate system throughput. B.Tech style answers compare polling, interrupts, and DMA using CPU overhead and latency.

Key relations & formulas

Formulas (Indian textbook notation)

  • PIO:CPUpollsstatusregisterinloopPIO: CPU polls status register in loop

Formulas (Indian textbook notation)

  • interrupt:ISRservicesdeviceonIRQsignalinterrupt: ISR services device on IRQ signal

Formulas (Indian textbook notation)

  • DMA:controllertransfersblock;CPUnotifiedoncompletionDMA: controller transfers block; CPU notified on completion

Notation and sign conventions

Relation 1 —
PIO:CPUpollsstatusregisterinloopPIO: CPU polls status register in loop

Formulas (Indian textbook notation)

  • PIO:CPUpollsstatusregisterinloopPIO: CPU polls status register in loop
Write this relation with symbols exactly as in Computer System Architecture — Morris Mano before substituting numbers. Examiners award partial marks for a correct setup even when arithmetic slips.
Relation 2 —
interrupt:ISRservicesdeviceonIRQsignalinterrupt: ISR services device on IRQ signal

Formulas (Indian textbook notation)

  • interrupt:ISRservicesdeviceonIRQsignalinterrupt: ISR services device on IRQ signal
Write this relation with symbols exactly as in Computer System Architecture — Morris Mano before substituting numbers. Examiners award partial marks for a correct setup even when arithmetic slips.
Relation 3 —
DMA:controllertransfersblock;CPUnotifiedoncompletionDMA: controller transfers block; CPU notified on completion

Formulas (Indian textbook notation)

  • DMA:controllertransfersblock;CPUnotifiedoncompletionDMA: controller transfers block; CPU notified on completion
Write this relation with symbols exactly as in Computer System Architecture — Morris Mano before substituting numbers. Examiners award partial marks for a correct setup even when arithmetic slips.

Concept in depth

Programmed I/O is simple but wastes CPU cycles in polling loops. Interrupt-driven I/O improves utilization by servicing devices only when needed. DMA offloads bulk transfer by moving blocks directly between memory and devices. Interrupt controllers prioritize events and support nested handling for real-time responsiveness.

Assumptions and validity limits

State assumptions explicitly before using any relation for input output organization — steady state, uniform properties, linear elastic material, ideal gas, incompressible flow, etc., as applicable.
Wrong assumptions invalidate the entire solution even when the formula is correct. In Computer Architecture viva and GATE descriptive questions, listing valid assumptions often earns separate marks.

Step-by-step problem approach

1. Read the question and list given data with SI units (common in Computer Architecture papers).
2. Draw a neat labelled diagram where applicable — examiners in Indian universities award diagram marks even when arithmetic slips.
3. Identify which relation from this topic applies to input output organization.
4. Use equation 1:
PIO:CPUpollsstatusregisterinloopPIO: CPU polls status register in loop
.
5. Use equation 2:
interrupt:ISRservicesdeviceonIRQsignalinterrupt: ISR services device on IRQ signal
.
6. Substitute values, compute, and verify units and sign (direction).
7. State conclusion in one line — e.g. safe/unsafe, stable/unstable, feasible/infeasible.

Applications & exam relevance

Input Output Organization appears in processor and system design. In Indian computer hardware curricula this topic is tested because it connects theory to CPU, memory hierarchy, and I/O.
GATE and semester exams often combine input output organization with earlier units — revise prerequisites before attempting mixed problems.
Industry interview panels sometimes ask: "Where did you use input output organization?" — answer with a lab, mini-project, or plant visit example if possible.

Common mistakes in exams

Students often write that DMA needs no CPU at all; setup and completion handling still involve CPU. Also, memory-mapped and isolated I/O instructions are frequently interchanged incorrectly.

Quick revision checklist

Before attempting input output organization problems, confirm you can:
1. Vectored interrupt supplies handler address
2. Interrupt priority and nesting
3. Memory-mapped I/O vs isolated I/O port space
Revise the solved examples in Computer System Architecture — Morris Mano and one previous-year GATE or university paper for this unit.

Worked examples

Try the problem first — open the solution when you are ready to check.

DMA transfer time

Problem

A DMA controller transfers 4096 bytes over a 16-bit bus at 20 MHz, one transfer per cycle. Estimate data phase time.

Solution

16-bit bus transfers 2 bytes/cycle. Required cycles = 4096/2 = 2048. Time = 2048 / 20e6 = 102.4 microseconds.

Conceptual check — Input Output Organization

Problem

In a Computer Architecture semester or GATE paper you are asked: "State the main assumption, the governing relation, and one practical consequence of input output organization." What should a complete answer include?

📖 Standard books (India)

  • Computer System ArchitectureMorris Mano

    Read: Syllabus unit

    CPU, memory hierarchy, and I/O