Interrupts and DMA

On an interrupt, the 8086 pushes the flags and return address, then jumps to the interrupt service routine (ISR) whose address (CS:IP) it reads from the interrupt vector table. Each interrupt type occupies four bytes, so its table address is type × 4.

Interrupts are maskable (INTR, disabled by clearing IF) or non-maskable (NMI, always serviced). The 8259 Programmable Interrupt Controller prioritises up to eight interrupt requests, expandable to 64 by cascading.

Relation 1 —

Write this relation with symbols exactly as in Microprocessor Architecture & Programming — Ramesh Gaonkar before substituting numbers. Examiners award partial marks for a correct setup even when arithmetic slips.

Relation 2 —

Write this relation with symbols exactly as in Microprocessor Architecture & Programming — Ramesh Gaonkar before substituting numbers. Examiners award partial marks for a correct setup even when arithmetic slips.

Relation 3 —

Write this relation with symbols exactly as in Microprocessor Architecture & Programming — Ramesh Gaonkar before substituting numbers. Examiners award partial marks for a correct setup even when arithmetic slips.

The ISR must save any registers it uses, service the device, send an end-of-interrupt (EOI) command to the 8259, and return with IRET, which restores the flags and address from the stack.

DMA (Direct Memory Access) lets a controller like the 8237 transfer data between memory and a peripheral directly, taking over the bus so the CPU is not burdened by each byte — essential for disk and high-speed I/O.

The DMA controller is loaded with the starting address and a count (bytes − 1); it transfers until the count expires, then signals completion.

State assumptions explicitly before using any relation for interrupts and dma — steady state, uniform properties, linear elastic material, ideal gas, incompressible flow, etc., as applicable.

Wrong assumptions invalidate the entire solution even when the formula is correct. In Microprocessors viva and GATE descriptive questions, listing valid assumptions often earns separate marks.

1. Read the question and list given data with SI units (common in Microprocessors papers).
2. Draw a neat labelled diagram where applicable — examiners in Indian universities award diagram marks even when arithmetic slips.
3. Identify which relation from this topic applies to interrupts and dma.
4. Use equation 1: .
5. Use equation 2: .
6. Substitute values, compute, and verify units and sign (direction).
7. State conclusion in one line — e.g. safe/unsafe, stable/unstable, feasible/infeasible.

Interrupts and DMA appears in embedded and industrial controllers. In Indian electrical curricula this topic is tested because it connects theory to 8086 architecture and interfacing.

GATE and semester exams often combine interrupts and dma with earlier units — revise prerequisites before attempting mixed problems.

Industry interview panels sometimes ask: "Where did you use interrupts and dma?" — answer with a lab, mini-project, or plant visit example if possible.

• Computing vector address as type × 2 instead of type × 4
• Forgetting to send EOI to the 8259 (blocks further interrupts of equal/lower priority)
• Loading the DMA count as bytes instead of bytes − 1
• Assuming NMI can be masked like INTR

Before attempting interrupts and dma problems, confirm you can:

1. Maskable INTR vs non-maskable NMI
2. ISR must send EOI to PIC before return
3. DMA frees CPU during bulk data transfer

Revise the solved examples in Microprocessor Architecture & Programming — Ramesh Gaonkar and one previous-year GATE or university paper for this unit.